1. Technical Field
Generally, the present disclosure relates to integrated circuits, and, more particularly, to safe reset configuration of components thereof.
2. Description of the Related Art
Insuring reliable reset state for integrated circuits is highly desirable. Scan shift reset can be used to fully initialize all flip flops in a design, but often fuse bits must be read and applied for the full state to be preset. To apply fuse bits, some prior designs require fuse data to be delivered before scan shift reset completes, other prior designs use control logic and flops to distribute fuse data, and some still other prior designs use synchronizers to synchronize the asynchronous fuse signals into the destination domain.
Often, these prior attempts to read and apply fuse bits are technology/library/placement dependent and thus are hard to carry from one design to another. For example, the synchronizer method must be carefully analyzed for each design targeted for different technology, because the synchronizer library cell design can be different and thus the metastability characteristic is also different. The end result is variations in the failure rates in different design. The actual design might need to be adjusted to provide enough guard band, based on calculated failure rates.
There remains a need for fuse data to be safely distributed without a need for pipeline flops.